The present invention relates generally to an electric circuit used in instrumentation applications, and more particularly, an electronic circuit providing a selectable short circuit for use in instrumentation applications such as measuring the total resistance of pairs of associated electrical conductors in transmission lines having a plurality of conductor pairs.
Use of electronic circuits in instrumentation applications is well known. Included among such applications is the measurement of the total resistance for a pair of associated electrical conductors included within a transmission line having a plurality of associated electrical conductor pairs. One such transmission line is a cable having a plurality of associated electrical conductor pairs. Those skilled in the art will appreciate that a multi-pair cable tester such as a local area network (LAN) cable tester is generally utilized to measure the wire pair resistance as part of the testing conducted in order to ensure that the cable functions properly in accordance with its required specifications. The wire pair resistance test is performed for each pair of associated electrical conductors included within the tested cable. This test is carried out one pair at a time. Alternatively, one select pair of associated electrical conductors will constitute a cable tester or certifier pair, and will be the pair of conductors subject to testing.
In order to perform the wire pair resistance test, for each electrical conductor pair, the adjacent ends positioned at one end of the transmission line (i.e., shorting end) are selectively electrically coupled together by a short circuit provided between those ends. For the pair under test, a current source is selectively electrically coupled to its opposite end positioned at the other end of the transmission line (i.e., measurement end). As such, the current source selectively drives an electrical current through that electrical conductor of the pair, through the selectable short electrically coupling the conductors, and through the other electrical conductor of the pair. The measurement end of the other conductor of the pair is selectively electrically coupled to a specified reference voltage or return path, thereby completing a circuit path for the electrical current driven through the associated conductors of the pair by the current source.
At the measurement end, voltage sensing circuitry is selectively electrically coupled across the associated electrical conductors of the pair. The differential voltage of the conductors is measured by the voltage sensing circuitry, indicating the voltage drop across the electrical conductors and the selectable short circuit. From the measured voltage and the test current, the total resistance for the electrical conductors can be determined. In effect, this value can be determined by dividing the magnitude of the sensed voltage by the known magnitude of the electrical current produced by the current source. This calculation is well known by those skilled in the art as an application of Ohm""s law.
When pairs of associated electrical conductors in transmission lines are tested, several different tests are conducted on each conductor pair. As a result, and as those skilled in the art will appreciate, it is impractical to electrically couple the shorting ends of each conductor in the pair with a simple short. In addition to total resistance, other parameters are also measured, such as capacitance, electrical length, and radio frequency (RF) response parameters. Multiplexer circuitry is generally electrically coupled at each end of the electrical conductors in the transmission line to permit the selected pair of associated conductors to be electrically coupled to the measurement and/or shorting circuits for the variety of measurements to be taken during testing.
FIG. 1 illustrates a prior art cable conductor pair resistance test circuit generally designated 10. Test circuit 10 is designed to permit determination of the total resistance for selected pairs of the electrical conductors included within a transmission line such as cable 12 shown in FIG. 1 by providing a selectable short between the conductor pairs being measured. In its illustrated form, cable 12 includes a first pair of associated electrical conductors 14, 16, a second pair of associated electrical conductors 18, 20, a third pair of associated electrical conductors 22, 24, and a fourth pair of associated electrical conductors 26, 28.
Test circuit 10 includes measurement circuit components grouped together and identified by reference numeral 30 positioned at the measurement end of the test circuit, and shorting circuit components grouped together and identified by reference numeral 32 positioned at the shorting end of the test circuit. In the illustrated form, measurement circuit components 30 include a multiplexer circuit 34 shown in the form of a four-wire differential four-to-one multiplexer. Multiplexer circuit 34 includes a plurality of terminals such as pins incorporated in an integrated circuit packaging. Among the terminals of multiplexer circuit 34, for present purposes, select ones of those terminals are designated DRV+, DRVxe2x88x92, SEN+, SENxe2x88x92, A+, Axe2x88x92, B+, Bxe2x88x92, C+, Cxe2x88x92, D+, and Dxe2x88x92.
Measurement circuit components 30 also include a current source 36, a differential voltage sensing amplifier 38, and the combination of a series-coupled resistor 40 and voltage source 42, all of which are electrically coupled to multiplexer circuit 34. In particular, current source 36 is electrically coupled at one of its ends to the DRV+ terminal of multiplexer circuit 34, and at its other end to a voltage reference, as shown. The input terminals of differential amplifier 38 are electrically coupled to the SEN+ and SENxe2x88x92 terminals of multiplexer circuit 34, while its output terminal is preferably electrically coupled to additional voltage sensing circuitry (not shown). The combination of resistor 40 and voltage source 42 is electrically coupled to the DRVxe2x88x92 terminal of multiplexer circuit 34 at one of its ends, and electrically coupled to a voltage reference at its other end.
As further shown, with respect to the electrical conductors included within cable 12, conductor 14 is electrically coupled to terminal A+ of multiplexer circuit 34, conductor 16 is electrically coupled to terminal Axe2x88x92 of multiplexer circuit 34, and so forth, as shown. With this arrangement, determination of the total resistance for pairs of associated electrical conductors of cable 12 can be measured by measurement circuit 30.
Shorting circuit components 32 include a multiplexer circuit 44 illustrated as a differential four-to-one multiplexer. Similar to multiplexer circuit 34, multiplexer circuit 44 includes a plurality of terminals such as pins of the type used in integrated circuit packaging technology. Among the terminals of multiplexer circuit 44, for present purposes, select ones have been designated A+, Axe2x88x92, B+, Bxe2x88x92, C+, Cxe2x88x92, D+, Dxe2x88x92, SEN+, and SENxe2x88x92.
Shorting circuit 32 also includes a relay or semiconductor switch 46 having two terminals. One terminal of relay/switch 46 is electrically coupled to the SEN+ terminal of multiplexer 44, while the other terminal of relay/switch 46 is electrically coupled to the SENxe2x88x92 terminal of multiplexer circuit 44.
With respect to the electrical conductors included within cable 12, their respective shorting ends to be electrically coupled by a short circuit due to relay/switch 46 during the test are electrically coupled to select ones of the terminals for multiplexer circuit 44. In particular, electrical conductor 14 is electrically coupled to terminal A+ of multiplexer circuit 44, electrical conductor 16 is electrically coupled to terminal Axe2x88x92 multiplexer circuit 44, and so forth, as shown.
With this arrangement, as will be appreciated by those skilled in the art, shorting circuit 32 is able to selectively provide a short circuit between associated electrical conductors included within cable 12.
In operation, measurement circuit 30 permits determination of the total resistance for two associated electrical conductors of a select pair within cable 12 when shorting circuit 32 provides a short circuit at the opposite end of the conductors under test. In particular, when it is desired to determine the total resistance for a select pair of associated conductors, the channel of multiplexer circuit 34 electrically coupled to that pair is enabled, thereby electrically coupling current source 36 and the noninverting input terminal of differential amplifier 38 to one of the associated electrical conductors of the select pair at its measurement end, while electrically coupling the inverting input terminal of differential amplifier 38 and the combination of resistor 40 and voltage source 42 to the measurement end of the other associated electrical conductor in the select pair.
At that same time, the corresponding channel of multiplexer circuit 44 is enabled such that one of the associated conductors in the select pair is electrically coupled to one terminal of relay/switch 46, while the other electrical conductor in the select pair is electrically coupled to the other terminal of relay/switch 46. Relay/switch 46 is then closed, allowing the predetermined current to be delivered by current source 36 through the formed circuit path. In particular, this current is driven through the selected channel of multiplexer circuit 34, through the first electrical conductor of the selected pair, through the selected channel of multiplexer circuit 44, through relay 46, back through multiplexer circuit 44, through the other electrical conductor of the selected pair, back through multiplexer circuit 34, and through resistor 40.
The known current delivered by current source 36 will create a voltage differential between the respective measurement ends of the two associated electrical conductors of the selected pair. This differential voltage is related directly to the total wire resistance of those two electrical conductors. This differential voltage is measured by the differential voltage sensing amplifier 38 and any associated circuitry (not shown) electrically coupled to its output terminal. It will be appreciated that from this measured voltage, the total resistance of the associated electrical conductors in the selected pair can be determined therefrom in accordance with Ohm""s law, or in any other manner generally available.
FIG. 2 illustrates a schematic representation of the four-wire differential four-to-one multiplexer circuit 34 shown in FIG. 1. As shown, multiplexer circuit 34 includes a first four-to-one multiplexer circuit 50 designated M_Dxe2x88x92, a second four-to-one multiplexer circuit 52 designated M_Sxe2x88x92, a third four-to-one multiplexer circuit 54 designated M S+, and a fourth four-to-one multiplexer circuit 56 designated M_D+. As shown, multiplexer circuits 50, 52, 54, 56 are each electrically coupled to one of terminals DRV+, DRVxe2x88x92, SEN+, and SENxe2x88x92 of multiplexer circuit 34. Furthermore, multiplexer circuits 50,52,54,56 are each electrically coupled to one of the associated electrical conductors in each pair of conductors included within cable 12 (see FIG. 1) through select terminals of multiplexer circuit 34.
For example, multiplexer circuit 50 is electrically coupled to the DRVxe2x88x92 terminal of multiplexer circuit 34, and is further electrically coupled to terminals Axe2x88x92, Bxe2x88x92, Cxe2x88x92 and Dxe2x88x92 of multiplexer circuit 34, which, in turn, are electrically coupled to respective ones of the associated electrical conductors in each pair undergoing the total resistance wire pair test. It will be appreciated by those skilled in the art that the configuration of multiplexer circuit 34 shown in FIG. 2, as applied to the circuit shown in FIG. 1, is such that its on-resistance is effectively eliminated from having any effect on the test.
Referring back to FIG. 1, as described above, when the total resistance for a selected pair of associated electrical conductors is determined, multiplexer circuit 34 at the measurement end selects that pair, multiplexer circuit 44 at the shorting end also selects that pair, and relay or semiconductor switch 46 is closed. Current is then driven through the circuit by current source 36, and the voltage differential at the respective measurement ends of the associated electrical conductors is measured, thereby allowing the total resistance of the conductive path between those two measurement ends of the associated electrical conductors to be determined.
It will be appreciated by those skilled in the art that a resistance measurement error contribution results from the on-resistance of multiplexer circuit 44 and relay/switch 46. For example, in the case where the first pair of associated electrical conductors 14, 16 is undergoing the wire pair resistance test, the total resistance calculated would equal the sum of the resistance seen along the entire circuit path between the measurement end E20 of conductor 14 and the measurement end E21 of conductor 16. This total resistance would not only include the round-trip conductor resistance of conductors 14, 16, as desired, but would also include the round-trip resistance through multiplexer circuit 44 and relay/switch 46, which is not desired.
Prior art applications have attempted to negate and/or minimize the effect of the on-resistance associated with multiplexer circuit 44 and relay/switch 46. One approach implemented in prior art applications is the use of an electromechanical relay multiplexer having inherently low on-resistance characteristics. Those skilled in the art will appreciate that this approach has significant limitations, however, because electromechanical relays are inherently relatively large, slow, and less reliable in operation than their counterpart semiconductor integrated circuit multiplexers. As a result, this approach has proved to have significant shortcomings.
Another approach implemented in prior art applications is the development of systems and methods that mathematically calibrate out the contribution of the multiplexer and relay/switch on-resistance. While this approach is suitable for certain, limited applications, it is not suited for those circumstances in which the multiplexer and relay/switch on-resistance varies between the time the system was calibrated and the time the test is conducted. This error can be significant, as the typical semiconductor multiplexer on-resistance is in the range of one hundred ohms per leg (i.e., twice that for the round-trip multiplexer on-resistance). Furthermore, the on-resistance for the typical semiconductor multiplexer varies significantly with temperature. As a result, achieving a total resistance measurement or calculation with a resolution of one ohm or less is quite difficult under prior art practices.
In view of the foregoing, it is desirable to develop a new and improved electronic circuit used in instrumentation applications.
It is further desirable to develop a new and improved electronic circuit providing a selectable short circuit for use in instrumentation applications.
It is further desirable to develop a new and improved electric circuit that permits determination of the total resistance of pairs of associated electrical conductors in transmission lines having a plurality of conductor pairs.
It is further desirable to develop a new and improved LAN cable tester circuit.
It is further desirable to develop a new and improved LAN cable tester circuit that determines the total resistance of a pair of associated electrical conductors corresponding to a LAN cable tester or certifier.
It is further desirable to develop an electric circuit that negates the effect of the multiplexer on-resistance at the shorting end in cable wire pair test circuits.
It is further desirable to develop an electric circuit that negates the effect of the relay or switch used to short the shorting ends of two associated electrical conductors.
It is further desirable to develop an electric circuit having active electronic circuit components that emulate a short circuit.
It is further desirable to develop an electric circuit in which the active short circuit inherently cancels the on-resistance attributable to a semiconductor integrated circuit multiplexer electrically coupled thereto.
It is further desirable to develop an electric circuit that allows for use of semiconductor integrated circuit multiplexer circuits.
It is further desirable to develop an electric circuit that allows for use of smaller circuit components than used by counterpart circuits in certain instrumentation applications.
It is further desirable to develop an electric circuit that allows for use of less expensive circuit components than used by counterpart circuits in certain instrumentation applications.
It is further desirable to develop an electric circuit that dissipates less power than other counterpart circuits used in certain instrumentation applications.
It is further desirable to develop an electric circuit that is highly reliable.
It is further desirable to develop an electric circuit that permits elimination of a bank of electromechanical relays in certain instrumentation applications.
It is further desirable to develop an electronic circuit for use in instrumentation applications that require a precision short circuit to be applied to various pairs of associated electrical conductors or contacts.
These and other desired benefits of the preferred forms of the intention will become apparent from the following description. It will be understood, however, that a system or method could still appropriate the claimed invention without accomplishing each and every one of these desired benefits, including those gleaned from the following description. The appended claims, not these desired benefits, define the subject matter of the invention. Any and all benefits are derived from the preferred forms of the invention, not necessarily the invention in general.
In a preferred aspect of the invention, the invention is directed to a circuit for providing a selectable short between a pair of electrical nodes selected from a plurality of pairs of electrical nodes. The circuit includes a multiplexer circuit, a differential voltage amplifier circuit and first and second current output differential amplifier circuits.
The multiplexer circuit has a first terminal electrically coupled to a first node of a first pair of nodes. A second terminal is electrically coupled to a second node of the first pair of nodes. A third terminal is electrically coupled to a first node of a second pair of nodes. A fourth terminal is electrically coupled to a second node of the second pair of nodes. The multiplexer also includes at least four other terminals.
The differential voltage amplifier circuit has a first input terminal electrically coupled to a fifth terminal of the multiplexer circuit. It also has a second input terminal electrically coupled to a sixth terminal of the multiplexer circuit. Further, it has an output terminal.
The first current output differential amplifier circuit has a first input terminal electrically coupled to the output terminal of the differential voltage amplifier circuit. It also has a second input terminal held at a predetermined voltage level. Further, it has an output terminal electrically coupled to a seventh terminal of the multiplexer circuit.
The second current output differential amplifier circuit has a first input terminal electrically coupled to the output terminal of the differential voltage amplifier circuit. It also has a second input terminal held at a predetermined voltage level. Further, it has an output terminal electrically coupled to an eighth terminal of the multiplexer circuit.
In a first condition, the multiplexer circuit electrically couples its first terminal to its fifth terminal and to its seventh terminal. At that same time, it also electrically couples its second terminal to its sixth terminal and to its eighth terminal.
In a second condition, the multiplexer circuit electrically couples its third terminal to its fifth terminal and to its seventh terminal. At that same time, it also electrically couples its fourth terminal to its sixth terminal and to its said eighth terminal.